/*!
    \file    change log.txt
    \brief   change log for  GD32F403 firmware

    \version 2026-2-6, V3.0.3, firmware for GD32F403
*/

/*
    Copyright (c) 2026, GigaDevice Semiconductor Inc.

    Redistribution and use in source and binary forms, with or without modification, 
are permitted provided that the following conditions are met:

    1. Redistributions of source code must retain the above copyright notice, this 
       list of conditions and the following disclaimer.
    2. Redistributions in binary form must reproduce the above copyright notice, 
       this list of conditions and the following disclaimer in the documentation 
       and/or other materials provided with the distribution.
    3. Neither the name of the copyright holder nor the names of its contributors 
       may be used to endorse or promote products derived from this software without 
       specific prior written permission.

    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
OF SUCH DAMAGE.
*/
******************* V3.0.3 2026-02-04 ******************************************************************************************
______________________Common_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/CMSIS/GD/GD32F403/Include/gd32f403.h
fix reason:
add Cortex-M4 processor exceptions numbers
V3.0.2:
    NonMaskableInt_IRQn          = -14,    /*!< 2 non maskable interrupt                                 */
    MemoryManagement_IRQn        = -12,    /*!< 4 Cortex-M4 memory management interrupt                  */
    BusFault_IRQn                = -11,    /*!< 5 Cortex-M4 bus fault interrupt       
V3.0.3:
    NonMaskableInt_IRQn          = -14,    /*!< non maskable interrupt                                   */
    HardFault_IRQn               = -13,    /*!< hard-fault interrupt */
    MemoryManagement_IRQn        = -12,    /*!< 4 Cortex-M4 memory management interrupt                  */
    BusFault_IRQn                = -11,    /*!< 5 Cortex-M4 bus fault interrupt 
	
fix reason:	
Add EB project

fix reason:
MISRA modify: Modify the function interface that returns a value to have only one exit

fix reason:
Fix the issue of redirection and duplicate definition of the serial port print function
V3.0.2:
/* retarget the C library printf function to the USART */
int fputc(int ch, FILE *f)
{
    usart_data_transmit(EVAL_COM0, (uint8_t)ch);
    while(RESET == usart_flag_get(EVAL_COM0, USART_FLAG_TBE));
    return ch;
}
V3.0.3:
none
	

_______________________________________________________________________________________________________________________


______________________DAC_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/DAC/DAC_ADC_convert/gd32f403_it.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/DAC/DAC_ADC_convert/main.c
fix reason:
Change REGULAR from description and code to ROUTINE


/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/DAC/DAC_ADC_convert/main.c
fix reason:
3223 DAC example DAC_ADC_convert change
V3.0.2:
    /* configure ADC peripheral */
    adc_config();
    /* configure DAC peripheral */
    dac_config();
V3.0.3:
    nvic_config();
    /* configure DAC peripheral */
    dac_config();
    /* configure ADC peripheral */
    adc_config();
_______________________________________________________________________________________________________________________

______________________ADC_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Include/gd32f403_adc.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Source/gd32f403_adc.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/ADC/
fix reason:
Change REGULAR from description and code to ROUTINE

_______________________________________________________________________________________________________________________

______________________SDIO_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Source/gd32f403_sdio.c
fix reason:
before send command  need disable CSM
V3.0.2:
    uint32_t cmd_config = 0U;
    /* reset the command index, command argument and response type */
    SDIO_CMDAGMT &= ~SDIO_CMDAGMT_CMDAGMT;
V3.0.3:
    uint32_t cmd_config = 0U;
    /* disable the CSM */
    SDIO_CMDCTL &= ~SDIO_CMDCTL_CSMEN;
    /* reset the command index, command argument and response type */
    SDIO_CMDAGMT &= ~SDIO_CMDAGMT_CMDAGMT;
_______________________________________________________________________________________________________________________
	
	
______________________USBFS_____________________________________________________________________________________________

/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/dev_firmware_update/src/inter_flash_if.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/dev_firmware_update/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/audio/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/cdc_acm/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/composite_dev_hid_printer/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/custom_hid/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/in_application_program_hid/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/msc_cdrom/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/msc_udisk/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/standard_hid_keyboard/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/usb_printer/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Host/usb_host_hid_keyboard_mouse/inc/usb_conf.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Host/usb_host_msc_udisk/inc/usb_conf.h
fix reason:
Fixed USBFS issues caused by switching version6 compiler in Keil
delete static fmc_state_enum fmc_bank0_state_get(void);
delete static fmc_state_enum fmc_bank0_ready_wait(uint32_t timeout);	
fix reason:
The keywords related to compiler GNUS in conf.h are changed uniformly
V3.0.2:
        #define __packed __attribute__ ((__packed__))
V3.0.3:
        #define __packed __unaligned
		
		
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/in_application_program_hid/GD32EBuilder_project/.cproject
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/in_application_program_hid/MDK-ARM/iap_hid.uvopt
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/in_application_program_hid/MDK-ARM/iap_hid.uvoptx
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/in_application_program_hid/MDK-ARM/iap_hid.uvprojx
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USBFS/USB_Device/in_application_program_hid/src/flash_operation.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_usbfs_library/device/class/iap/Source/usb_iap_core.c
fix reason:
Resolve the IAP download bug.
_______________________________________________________________________________________________________________________

______________________I2C_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/SPI/I2S_master_transmit_slave_receive_dma/main.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Include/gd32f403_spi.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Source/gd32f403_spi.c
fix reason:
The I2S parameter macro was changed from I2S_STD_PHILLIPS to I2S_STD_PHILIPS
_______________________________________________________________________________________________________________________


______________________PMU_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/PMU/Deepsleep_wakeup_RTC/main.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/PMU/Deepsleep_wakeup_exti/main.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/PMU/Standby_wakeup_RTC/main.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/PMU/Standby_wakeup_pin/main.c
fix reason:
PMU routine frequency switching patch added
V3.0.2:

V3.0.3:
add
/* software delay to prevent the impact of Vcore fluctuations.
   It is strongly recommended to include it to avoid issues caused by self-removal. */
static void _soft_delay_(uint32_t time)
{
    __IO uint32_t i;
    for(i=0; i<time*10; i++){
    }
}
...
        /* The following is to prevent Vcore fluctuations caused by frequency switching. 
           It is strongly recommended to include it to avoid issues caused by self-removal. */
        _soft_delay_(0x50);
        rcu_ahb_clock_config(RCU_AHB_CKSYS_DIV2);
        _soft_delay_(0x50);
        rcu_ahb_clock_config(RCU_AHB_CKSYS_DIV4);
        _soft_delay_(0x50);
        rcu_ahb_clock_config(RCU_AHB_CKSYS_DIV8);
        _soft_delay_(0x50);
        rcu_ahb_clock_config(RCU_AHB_CKSYS_DIV16);
        _soft_delay_(0x50);
        rcu_system_clock_source_config(RCU_CKSYSSRC_IRC8M);
        _soft_delay_(200);
        rcu_ahb_clock_config(RCU_AHB_CKSYS_DIV1);
_______________________________________________________________________________________________________________________
	
______________________MISC_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Source/gd32f403_misc.c
fix reason:
update nvic_irq_enable implement
V3.0.2:
    uint32_t temp_priority = 0x00U, temp_pre = 0x00U, temp_sub = 0x00U;
    /* use the priority group value to get the temp_pre and the temp_sub */
    if(((SCB->AIRCR) & (uint32_t)0x700U)==NVIC_PRIGROUP_PRE0_SUB4){
        temp_pre=0U;
        temp_sub=0x4U;
    }else if(((SCB->AIRCR) & (uint32_t)0x700U)==NVIC_PRIGROUP_PRE1_SUB3){
        temp_pre=1U;
        temp_sub=0x3U;
    }else if(((SCB->AIRCR) & (uint32_t)0x700U)==NVIC_PRIGROUP_PRE2_SUB2){
        temp_pre=2U;
        temp_sub=0x2U;
    }else if(((SCB->AIRCR) & (uint32_t)0x700U)==NVIC_PRIGROUP_PRE3_SUB1){
        temp_pre=3U;
        temp_sub=0x1U;
    }else if(((SCB->AIRCR) & (uint32_t)0x700U)==NVIC_PRIGROUP_PRE4_SUB0){
        temp_pre=4U;
        temp_sub=0x0U;
    }else{
        nvic_priority_group_set(NVIC_PRIGROUP_PRE2_SUB2);
        temp_pre=2U;
        temp_sub=0x2U;
    }
    /* get the temp_priority to fill the NVIC->IP register */
    temp_priority = (uint32_t)nvic_irq_pre_priority << (0x4U - temp_pre);
    temp_priority |= nvic_irq_sub_priority &(0x0FU >> (0x4U - temp_sub));
    temp_priority = temp_priority << 0x04U;
    NVIC->IP[nvic_irq] = (uint8_t)temp_priority;
    /* enable the selected IRQ */
    NVIC->ISER[nvic_irq >> 0x05U] = (uint32_t)0x01U << (nvic_irq & (uint8_t)0x1FU);
V3.0.3:
    uint32_t nvic_prigroup, nvic_priority;

    /* check current priority group */
    switch(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) {
    case NVIC_PRIGROUP_PRE0_SUB4:
    case NVIC_PRIGROUP_PRE1_SUB3:
    case NVIC_PRIGROUP_PRE2_SUB2:
    case NVIC_PRIGROUP_PRE3_SUB1:
    case NVIC_PRIGROUP_PRE4_SUB0:
        break;
    default:
        nvic_priority_group_set(NVIC_PRIGROUP_PRE2_SUB2);
        break;
    }

    /* get the priority group value */
    nvic_prigroup = NVIC_GetPriorityGrouping();

    /* encoding the pre-emption, subpriority priority */
    nvic_priority = NVIC_EncodePriority(nvic_prigroup, (uint32_t)nvic_irq_pre_priority, (uint32_t)nvic_irq_sub_priority);
    /* set priority */
    NVIC_SetPriority(nvic_irq, nvic_priority);

    /* enable the selected IRQ */
    NVIC_EnableIRQ(nvic_irq);
	
	
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Source/gd32f403_misc.c
fix reason:
Format Adjustment to support miscra rule 14.7
V3.0.2:
    NVIC->ICER[nvic_irq >> 0x05] = (uint32_t)0x01 << (nvic_irq & (uint8_t)0x1F);
V3.0.3:
    NVIC_DisableIRQ(nvic_irq);

	
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Include/gd32f403_misc.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Source/gd32f403_misc.c
fix reason:
Fix MISC code spelling error
V3.0.2:
void nvic_vector_table_set(uint32_t nvic_vict_tab, uint32_t offset)
{
    SCB->VTOR = nvic_vict_tab | (offset & NVIC_VECTTAB_OFFSET_MASK);
    __DSB();
}
V3.0.3:
void nvic_vector_table_set(uint32_t nvic_vect_tab, uint32_t offset)
{
    SCB->VTOR = nvic_vect_tab | (offset & NVIC_VECTTAB_OFFSET_MASK);
    __DSB();
}	
_______________________________________________________________________________________________________________________
	
______________________CAN_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Include/gd32f403_can.h
fix reason:
CAN filter base address modify;(CAN filter 23 data 0 register/ CAN filter 17 data 1 register)
V3.0.2:
#define CAN_F23DATA0(canx)                 REG32((canx) + 0x000003F8U)        /*!< CAN filter 23 data 0 register */
...
#define CAN_F17DATA1(canx)                 REG32((canx) + 0x0000024CU)        /*!< CAN filter 17 data 1 register */

V3.0.3:
#define CAN_F23DATA0(canx)                 REG32((canx) + 0x000002F8U)        /*!< CAN filter 23 data 0 register */
...
#define CAN_F17DATA1(canx)                 REG32((canx) + 0x000002CCU)        /*!< CAN filter 17 data 1 register */
	
	
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Include/gd32f403_can.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Source/gd32f403_can.c
fix reason:
Determine whether the CAN controller has three mailboxes transmitting simultaneously, and whether the mailbox to be aborted is the last one. If such an operation is performed, the code will exit and notify the customer that the abort operation has failed.
V3.0.2:
void can_transmission_stop(uint32_t can_periph, uint8_t mailbox_number)
{
    if(CAN_MAILBOX0 == mailbox_number) {
        CAN_TSTAT(can_periph) |= CAN_TSTAT_MST0;
        while(CAN_TSTAT_MST0 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST0)) {
        }
    } else if(CAN_MAILBOX1 == mailbox_number) {
        CAN_TSTAT(can_periph) |= CAN_TSTAT_MST1;
        while(CAN_TSTAT_MST1 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST1)) {
        }
    } else if(CAN_MAILBOX2 == mailbox_number) {
        CAN_TSTAT(can_periph) |= CAN_TSTAT_MST2;
        while(CAN_TSTAT_MST2 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST2)) {
        }
    } else {
        /* illegal parameters */
    }
}
V3.0.3:
ErrStatus can_transmission_stop(uint32_t can_periph, uint8_t mailbox_number)
{
    ErrStatus reval = SUCCESS;
    /* timeout for CAN_TSTAT_MSTx bits */
    uint32_t timeout = CAN_TIMEOUT;
    uint32_t reg_value0 = 0U;
    uint32_t reg_value1 = 0U;

    /* get the status of transmit FIFO order */
    reg_value0 = CAN_CTL(can_periph) & CAN_CTL_TFO;

    if(CAN_MAILBOX0 == mailbox_number) {
        reg_value1 = CAN_TSTAT(can_periph) & (CAN_TSTAT_TMLS0 | CAN_ALL_MAILBOX_EMPTY);
        if((CAN_CTL_TFO == reg_value0) && (CAN_TSTAT_TMLS0 == reg_value1)){
            reval = ERROR;
        } else {
            CAN_TSTAT(can_periph) |= CAN_TSTAT_MST0;
            while((CAN_TSTAT_MST0 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST0)) && (0U != timeout)) {
                timeout--;
            }
            if(CAN_TSTAT_MST0 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST0)){
                reval = ERROR;
            }
        }
    } else if(CAN_MAILBOX1 == mailbox_number) {
        reg_value1 = CAN_TSTAT(can_periph) & (CAN_TSTAT_TMLS1 | CAN_ALL_MAILBOX_EMPTY);
        if((CAN_CTL_TFO == reg_value0) && (CAN_TSTAT_TMLS1 == reg_value1)){
            reval = ERROR;
        }else{
            CAN_TSTAT(can_periph) |= CAN_TSTAT_MST1;
            while((CAN_TSTAT_MST1 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST1)) && (0U != timeout)) {
                timeout--;
            }
            if(CAN_TSTAT_MST1 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST1)){
                reval = ERROR;
            }
        }
        
    } else if(CAN_MAILBOX2 == mailbox_number) {
        reg_value1 = CAN_TSTAT(can_periph) & (CAN_TSTAT_TMLS2 | CAN_ALL_MAILBOX_EMPTY);
        if((CAN_CTL_TFO == reg_value0) && (CAN_TSTAT_TMLS2 == reg_value1)){
            reval = ERROR;
        }else{
            CAN_TSTAT(can_periph) |= CAN_TSTAT_MST2;
            while((CAN_TSTAT_MST2 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST2)) && (0U != timeout)) {
                timeout--;
            }
            if(CAN_TSTAT_MST2 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST2)){
                reval = ERROR;
            }
        }
    } else {
        /* illegal parameters */
    }
    return reval;
}	


/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Include/gd32f403_can.h
fix reason:
Change the spelling of a member's name
V3.0.2:
    CAN_ERROR_FILL,                                                     /*!< fill error */
    CAN_ERROR_FORMATE,                                                  /*!< format error */
    CAN_ERROR_ACK,                                                      /*!< ACK error */
    CAN_ERROR_BITRECESSIVE,                                             /*!< bit recessive error */
    CAN_ERROR_BITDOMINANTER,                                            /*!< bit dominant error */
    CAN_ERROR_CRC,                                                      /*!< CRC error */
    CAN_ERROR_SOFTWARECFG,                                              /*!< software configure */

V3.0.3:
    CAN_ERROR_FILL,                                                     /*!< fill error */
    CAN_ERROR_FORMAT,                                                   /*!< format error */
    CAN_ERROR_ACK,                                                      /*!< ACK error */
    CAN_ERROR_BITRECESSIVE,                                             /*!< bit recessive error */
    CAN_ERROR_BITDOMINANT,                                              /*!< bit dominant error */
    CAN_ERROR_CRC,                                                      /*!< CRC error */
    CAN_ERROR_SOFTWARECFG,                                              /*!< software configure */

	
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CAN/communication_Loopback/gd32f403_it.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CAN/communication_Loopback/gd32f403_it.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CAN/communication_among_CANs/gd32f403_it.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CAN/communication_among_CANs/gd32f403_it.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CAN/communication_among_Devices/gd32f403_it.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CAN/communication_among_Devices/gd32f403_it.h
fix reason:
add void SysTick_Handler(void);


/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CAN/communication_Loopback/main.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CAN/communication_among_CANs/main.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CAN/communication_among_Devices/main.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Source/gd32f403_can.c
fix reason:
Correct the spelling errors
V3.0.2:
    can_trasnmit_message_struct
V3.0.3:
    can_transmit_message_struct

_______________________________________________________________________________________________________________________
______________________FMC_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/FMC/Write_Protection/main.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/FMC/Erase_Program/main.c
fix reason:
To erase or write flash or option bytes, it is necessary to clear the exception flag first before proceeding with the operation
V3.0.2:

V3.0.3:
add
    /* clear all pending flags */
    fmc_flag_clear(FMC_FLAG_BANK0_END);
    fmc_flag_clear(FMC_FLAG_BANK0_WPERR);
    fmc_flag_clear(FMC_FLAG_BANK0_PGERR);
_______________________________________________________________________________________________________________________	



______________________BKP_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/BKP/Backup_data/main.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/BKP/Tamper/main.c
fix reason:
If the RCU_BDCTL_BKPRST position reads BKP_DATAx at a certain time, it will cause the MCU to crash or go out of control. Before accessing the content of the backup domain, it is necessary to first determine whether the RCU_BDCTL_BKPRST bit has been reset to zero. If it is set, it should be cleared.
V3.0.2:
    pmu_backup_write_enable();
    /* clear the bit flag of tamper event */
    bkp_flag_clear(BKP_FLAG_TAMPER);
V3.0.3:
    pmu_backup_write_enable();
    /* confirm RCU_BDCTL_BKPRST bit is reset */
    if(RESET != (RCU_BDCTL & RCU_BDCTL_BKPRST)){
        rcu_bkp_reset_disable();
    }
    /* clear the bit flag of tamper event */
    bkp_flag_clear(BKP_FLAG_TAMPER);
_______________________________________________________________________________________________________________________	

______________________FWDGT_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/FWDGT/FWDGT_key/main.c
fix reason:
Add macro configuration to adapt to XD and HD models
V3.0.2:
    /* After 1.6 seconds to generate a reset */
    fwdgt_enable();
V3.0.3:
none

/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Firmware/GD32F403_standard_peripheral/Source/gd32f403_fwdgt.c
fix reason:
The original code was "wait for PUD and RUD before writing PSC and RLD", but it was changed to "enable FWDGT first, then write PSC and RLD, then wait for RUD and PUD to clear".
eg:
V3.0.2:
    uint32_t timeout = FWDGT_PSC_TIMEOUT;
    uint32_t flag_status = RESET;

    /* enable write access to FWDGT_PSC */
    FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;

    /* wait until the PUD flag to be reset */
    do {
        flag_status = FWDGT_STAT & FWDGT_STAT_PUD;
    } while((--timeout > 0U) && ((uint32_t)RESET != flag_status));

    if((uint32_t)RESET != flag_status) {
        return ERROR;
    }

    /* configure FWDGT */
    FWDGT_PSC = (uint32_t)prescaler_value;

    return SUCCESS;
V3.0.3:
    uint32_t timeout = FWDGT_PSC_TIMEOUT;
    uint32_t flag_status;
    ErrStatus status = SUCCESS;

    /* enable write access to FWDGT_PSC */
    FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;

    /* configure FWDGT_PSC */
    FWDGT_PSC = (uint32_t)prescaler_value;

    /* wait until the PUD flag to be reset */
    do {
        flag_status = FWDGT_STAT & FWDGT_STAT_PUD;
    } while((--timeout > 0U) && (0U != flag_status));

    if(0U != flag_status) {
        status = ERROR;
    }

    return status;
__________________________________________________________________________________________________________________________
	
	


	
______________________RCU_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/RCU/Ckout_pin_clock_output/main.c
fix reason:
Delete invalid function declaration files and delete function declarations
V3.0.2:
void rcu_config(void);(del)
void gpio_config(void);(del)
void all_led_init(void);
void all_led_off(void);
void led_flash(int times);(del)
void dac_config(void);(del)
void clock_output_select(uint8_t seq);
void clock_output_config(void);
V3.0.3:
void all_led_init(void);
void all_led_off(void);
void clock_output_select(uint8_t seq);
void clock_output_config(void);	

	
__________________________________________________________________________________________________________________________


______________________DBG_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/DBG/DBG_timer1_stop/main.c
fix reason:
Fix bugs caused by GCC optimizations on example
Change the following code to the top of the file instead of inside the function:
    timer_parameter_struct timer_initpara;
    timer_oc_parameter_struct timer_ocintpara;


__________________________________________________________________________________________________________________________

______________________USART_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USART/Half_duplex_transmitter&receiver/main.c
fix reason:
Solve the problems under the EB OS2 optimization level


/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/USART/DMA_transmitter&receiver/main.c
fix reason:
Fix routine errors in EB
V3.0.2:
	dma_deinit(DMA0, DMA_CH3);
    dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
    dma_init_struct.memory_addr = (uint32_t)txbuffer;
    dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
    dma_init_struct.memory_width = DMA_PERIPHERAL_WIDTH_8BIT;
    dma_init_struct.number = ARRAYNUM(txbuffer);
    dma_init_struct.periph_addr = USART0_DATA_ADDRESS;
    dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
    dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
    dma_init(DMA0, DMA_CH3, &dma_init_struct);
V3.0.3:
    dma_deinit(DMA0, DMA_CH3);
    dma_struct_para_init(&dma_init_struct);
    dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
    dma_init_struct.memory_addr = (uint32_t)txbuffer;
    dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
    dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
    dma_init_struct.number = ARRAYNUM(txbuffer);
    dma_init_struct.periph_addr = USART0_DATA_ADDRESS;
    dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
    dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
    dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
    dma_init(DMA0, DMA_CH3, &dma_init_struct);

__________________________________________________________________________________________________________________________

______________________CTC_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CTC/CTC_gpio/gd32f403_it.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CTC/CTC_gpio/gd32f403_it.h
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CTC/CTC_lxtal/gd32f403_it.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/CTC/CTC_lxtal/gd32f403_it.h
fix reason:
Add interrupt files

__________________________________________________________________________________________________________________________


______________________DMA_____________________________________________________________________________________________
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/DMA/Ram_to_usart/gd32f403_it.c
/GD32F403_Firmware_Library/GD32F403_Firmware_Library/Examples/DMA/Ram_to_usart/main.c
fix reason:
Solve the problem that GCC fails to pass the high optimization level
V3.0.2:
FlagStatus g_transfer_complete = RESET;
V3.0.3:
__IO FlagStatus g_transfer_complete = RESET;
_______________________________________________________________________________________________________________________


******************* V3.0.2 2025-07-28 ******************************************************************************************
______________________Common______________________________________________________________________________________________

_______________________________________________________________________________________________________________________

________________________Module ADC _______________________________________________________________________________________

__________________________________________________________________________________________________________________________

______________________ADTIMER_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________BKP_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________BL0TIMER____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________BL1TIMER____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CAN_________________________________________________________________________________________________
../Firmware/GD32F403_standard_peripheral/Source/gd32f403_can.c
fix reason:
When the number of bytes sent by CAN exceeds 8, the frame sent by CAN to the bus will have a problem.
V3.0.1:
uint8_t can_message_transmit(uint32_t can_periph, can_trasnmit_message_struct *transmit_message)
{
    uint8_t mailbox_number = CAN_MAILBOX0;

    /* select one empty mailbox */
    if(CAN_TSTAT_TME0 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME0)) {
        mailbox_number = CAN_MAILBOX0;
    } else if(CAN_TSTAT_TME1 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME1)) {
        mailbox_number = CAN_MAILBOX1;
    } else if(CAN_TSTAT_TME2 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME2)) {
        mailbox_number = CAN_MAILBOX2;
    } else {
        mailbox_number = CAN_NOMAILBOX;
    }
    /* return no mailbox empty */
    if(CAN_NOMAILBOX == mailbox_number) {
        return CAN_NOMAILBOX;
    }

    CAN_TMI(can_periph, mailbox_number) &= CAN_TMI_TEN;
    if(CAN_FF_STANDARD == transmit_message->tx_ff) {
        /* set transmit mailbox standard identifier */
        CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_SFID(transmit_message->tx_sfid) | \
                                               transmit_message->tx_ft);
    } else {
        /* set transmit mailbox extended identifier */
        CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_EFID(transmit_message->tx_efid) | \
                                               transmit_message->tx_ff | \
                                               transmit_message->tx_ft);
    }
    /* set the data length */
    CAN_TMP(can_periph, mailbox_number) &= ~CAN_TMP_DLENC;
    CAN_TMP(can_periph, mailbox_number) |= transmit_message->tx_dlen;
    /* set the data */
    CAN_TMDATA0(can_periph, mailbox_number) = TMDATA0_DB3(transmit_message->tx_data[3]) | \
            TMDATA0_DB2(transmit_message->tx_data[2]) | \
            TMDATA0_DB1(transmit_message->tx_data[1]) | \
            TMDATA0_DB0(transmit_message->tx_data[0]);
    CAN_TMDATA1(can_periph, mailbox_number) = TMDATA1_DB7(transmit_message->tx_data[7]) | \
            TMDATA1_DB6(transmit_message->tx_data[6]) | \
            TMDATA1_DB5(transmit_message->tx_data[5]) | \
            TMDATA1_DB4(transmit_message->tx_data[4]);
    /* enable transmission */
    CAN_TMI(can_periph, mailbox_number) |= CAN_TMI_TEN;

    return mailbox_number;
}

V3.0.2:
uint8_t can_message_transmit(uint32_t can_periph, can_trasnmit_message_struct *transmit_message)
{
    uint8_t mailbox_number = CAN_MAILBOX0;

    /* select one empty mailbox */
    if(CAN_TSTAT_TME0 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME0)) {
        mailbox_number = CAN_MAILBOX0;
    } else if(CAN_TSTAT_TME1 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME1)) {
        mailbox_number = CAN_MAILBOX1;
    } else if(CAN_TSTAT_TME2 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME2)) {
        mailbox_number = CAN_MAILBOX2;
    } else {
        mailbox_number = CAN_NOMAILBOX;
    }
    /* return no mailbox empty */
    if(CAN_NOMAILBOX == mailbox_number) {
        return CAN_NOMAILBOX;
    }

    CAN_TMI(can_periph, mailbox_number) &= CAN_TMI_TEN;
    if(CAN_FF_STANDARD == transmit_message->tx_ff) {
        /* set transmit mailbox standard identifier */
        CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_SFID(transmit_message->tx_sfid) | \
                                               transmit_message->tx_ft);
    } else {
        /* set transmit mailbox extended identifier */
        CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_EFID(transmit_message->tx_efid) | \
                                               transmit_message->tx_ff | \
                                               transmit_message->tx_ft);
    }
    /* set the data length */
    CAN_TMP(can_periph, mailbox_number) &= ~CAN_TMP_DLENC;
    
    /* Classic CAN frame data lenth does not exceed 8 */
    if (transmit_message->tx_dlen > 8U) {
        transmit_message->tx_dlen = 8U;
    }
    
    CAN_TMP(can_periph, mailbox_number) |= transmit_message->tx_dlen;
    /* set the data */
    CAN_TMDATA0(can_periph, mailbox_number) = TMDATA0_DB3(transmit_message->tx_data[3]) | \
            TMDATA0_DB2(transmit_message->tx_data[2]) | \
            TMDATA0_DB1(transmit_message->tx_data[1]) | \
            TMDATA0_DB0(transmit_message->tx_data[0]);
    CAN_TMDATA1(can_periph, mailbox_number) = TMDATA1_DB7(transmit_message->tx_data[7]) | \
            TMDATA1_DB6(transmit_message->tx_data[6]) | \
            TMDATA1_DB5(transmit_message->tx_data[5]) | \
            TMDATA1_DB4(transmit_message->tx_data[4]);
    /* enable transmission */
    CAN_TMI(can_periph, mailbox_number) |= CAN_TMI_TEN;

    return mailbox_number;
}

__________________________________________________________________________________________________________________________

______________________CAU_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CEC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CFMU________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CLA_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CLTCFG______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CMP_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CPDM________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CRC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________CTC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DAC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DBG_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DBGSYS______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DCI_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DCM_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DMA_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________DMAMUX______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________EDOUT_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________EFUSE_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________ENET________________________________________________________________________________________________

_________________________________________________________________________________________________________________________

______________________EVIC________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________EXMC________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________EXTI________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________FAC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________FFT_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________FMC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________FMU_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GPIO________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GPTIMER_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GTOC________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GTOC________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GPTIMER_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________GTOC________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HPDF________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_CAU_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_DMA_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_HAU_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_IF______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_PKCAU___________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_RCU_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_SM2_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_SM3_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_SM4_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_Timer___________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_TRNG____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HSM_WDGT____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________HWSEM_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________I2C_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________ICACHE______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IFRP________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IOC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IPA_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IREF________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IRM_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________IVREF_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________LIN_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________LPDTS_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________LPTIMER_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________LPUSART_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________MCMU________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________MDIO________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________MDMA________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________MFCOM_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________MTC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________OPA_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________OSPI________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________OSPIM_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________PKCAU_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________PMU_________________________________________________________________________________________________
../Firmware/GD32F403_standard_peripheral/Source/gd32f403_pmu.c
fix reason:
Modifying the pmu_to_sleepmode() function to enter sleep with WFE requires one SEV instruction and two WFE instructions
V3.0.1:
void pmu_to_sleepmode(uint8_t sleepmodecmd)
{
    /* clear sleepdeep bit of Cortex-M4 system control register */
    SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);

    /* select WFI or WFE command to enter sleep mode */
    if(WFI_CMD == sleepmodecmd) {
        __WFI();
    } else {
        __WFE();
    }
V3.0.2:
void pmu_to_sleepmode(uint8_t sleepmodecmd)
{
    /* clear sleepdeep bit of Cortex-M4 system control register */
    SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);

    /* select WFI or WFE command to enter sleep mode */
    if(WFI_CMD == sleepmodecmd) {
        __WFI();
    } else {
        __SEV();
        __WFE();
        __WFE();
    }
}

../Firmware/GD32F403_standard_peripheral/Source/gd32f403_pmu.c
../Firmware/GD32F403_standard_peripheral/Include/gd32f403_pmu.h
fix reason:
Modifying the pmu_to_sleepmode() function to enter sleep with WFE requires one SEV instruction and two WFE instructions
V3.0.1:
1.

2.

V3.0.2:
1.
    \brief      enable PMU lvd
    \param[in]  none
    \param[out] none
    \retval     none
*/
void pmu_lvd_enable(void)
{
    PMU_CTL |= PMU_CTL_LVDEN;
}

2.
/* enable PMU lvd */
void pmu_lvd_enable(void);

__________________________________________________________________________________________________________________________

______________________POC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________QSPI________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________RAMECCMU____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________RCU_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________RSPDIF______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________RTC_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________RTDEC_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SAI_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SDIO________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SENT________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SHRTIMER____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SLCD________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SPI_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SQPI________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________STCM________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SVPWM_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________SYSTEM______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TIMER_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TLI_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TMU_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TRIGSEL_____________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TRNG________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TSI_________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________TZPCU_______________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________USART_______________________________________________________________________________________________

________________________________________________________________________________________________________________________

______________________USBD________________________________________________________________________________________________
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/class/xxx
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/device/xxx
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/usbd/xxx
fix reason:
Issue Description: Add dual buffer examples for CDC/MSC/AUDIO.
V3.0.1:
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/class/device/audio/Include/xxx.h
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/class/device/audio/Source/xxx.c
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/class/device/cdc/Source/xxx.c
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/class/device/msc/Source/xxx.c
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/device/Include/xxx.h
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/device/Source/xxx.c
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/usbd/Include/xxx.h
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/usbd/Source/xxx.c
V3.0.2:
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/class/device/audio/Include/xxx.h
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/class/device/audio/Source/xxx.c
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/class/device/cdc/Source/xxx.c
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/class/device/msc/Source/xxx.c
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/device/Include/xxx.h
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/device/Source/xxx.c
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/usbd/Include/xxx.h
../Firmware/GD32F403_standard_peripheral/GD32F403_usbd_library/usbd/Source/xxx.c
______________________________________________________________________________________________________________________

_____________________USBFS________________________________________________________________________________________________
../Firmware/GD32F403_standard_peripheral/GD32F403_usbfs_library/driver/Source/drv_usb_dev.c
fix reason:
Fix the issue where the enum_speed parameter may cause an array out-of-bounds error.
V3.0.1:
uint32_t enum_speed = udev->regs.dr->DSTAT & DSTAT_ES;

V3.0.2:	
uint32_t enum_speed = ((udev->regs.dr->DSTAT & DSTAT_ES) >> 1);
_________________________________________________________________________________________________________________________

______________________USBHS_______________________________________________________________________________________________

__________________________________________________________________________________________________________________________

______________________VREF________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________WDGT________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

______________________WIFI________________________________________________________________________________________________


__________________________________________________________________________________________________________________________

